COMPUTER TECH. SKILLS
USB 3.0 System Architecture
Nº
3121
DATE: CALL
PRICE NIS: 1740 + VAT
DURATION: 2 Days
DATE: CALL
PRICE NIS: 1740 + VAT
DURATION: 2 Days
Course Overview:
The USB 3.0 (SuperSpeed) architecture is a third-generation, high-performance USB standard used to interconnect peripheral devices in computing platforms. USB 3.0 has been designed to consumer and high-end PCs, provides a greater than 10x increase in performance over the high-speed performance of USB 2.0 .
The Complete USB 3.0 is intensive 2- day course designed for the hardware or software engineer. Attendees will learn about the significant changes made in the USB 2.0 protocol. The training features in-depth coverage of the USB 3.0’s Physical, Data Link, and Protocol Layers. The changes in flow control and power management are examined.
The course provides practical examples of USB 3.0 transactions and error conditions. The rules required for a host and device to be specification compliant are indentified.
The Complete USB 3.0 is intensive 2- day course designed for the hardware or software engineer. Attendees will learn about the significant changes made in the USB 2.0 protocol. The training features in-depth coverage of the USB 3.0’s Physical, Data Link, and Protocol Layers. The changes in flow control and power management are examined.
The course provides practical examples of USB 3.0 transactions and error conditions. The rules required for a host and device to be specification compliant are indentified.
Who should attend?
Engineers proficient in USB 2.0 who need migrate to the new USB 3.0 protocol
Engineers, without previous experience with USB designs, want to learn newest USB 3.0 standard.
Engineers, without previous experience with USB designs, want to learn newest USB 3.0 standard.
Prerequisities:
Understanding protocols.
Course Outline:
1. USB 3.0 Architectural Overview
- Back compatibility to USB 2.0
- USB 3.0 Physical, Link and Protocol Layers
- USB 3.0 Systems Topology: Peripheral Devices, Host and Hubs
- New Mechanical and Connectors
- Transmitter/Receiver Block Diagram
- Data Scrambling and Encoding
- Symbols
- LFPS
- Link Management and Flow Control Overview
- Protocol Layer Packet Framing
- Link (Layer) Commands
- Logical Idle
- LTSSM
- USB 3.0 Flow Control
- USB 3.0 Reset
- USB 3.0 Transaction definition
- General packet features
- Header fields
- SuperSpeed Packet Definitions
- Transaction Sequences
- Device Notifications
5. USB 3.0 Transaction Sequencing
- Bulk Transfers
- Control
- Interrupt
- Isochronous
- USB Configuration Overview
- Device Configuration
- Hub Configuration and Routing
- Link Power Management
- Four Link Power States
- Function Suspend/Resume
