HARDWARE

Tips and Tricks for FPGA Designers

Nº 541
DATE: CALL
PRICE NIS: 1260 + VAT /3 Tcs
DURATION: 1 Day

Course Overview:

Attending the Tips & Tricks for FPGA Design class will enrich your knowledge in several aspects of the FPGA design world. This 1 day seminar will enable you to get familiar with new aspects and problems you may encounter during your project flow. In addition, by mastering the tools and the design methodologies presented in this course, you will be able to create your design faster, shorten your development time, lower the design risk and development costs.

Level:

Intermediate

Who should attend?

FPGA designers with intermediate knowledge, technical leaders and system engineers.

Prerequisities:

Fundamentals of FPGA Design flow.
Knowledge in FPGA design tools.
Solid electrical design background Software Tools: ISE 13.1, PlanAhead, ChipScope, other useful utilities

Software Tools:

ISE 13.1, PlanAhead, ChipScope, other useful utilities

Skills Gained:

After completing this training, you will be able to:

New methodologies
New design rules
Clock tree architecture
Floorplanning techniques
Use the advance implementation option
Design your next project with better understanding and lower the risk

Course Outline:

1. FPGA Designers – It is all about architecture?

2. Clock Tree Architecture

Virtex6/Spartn6
Virtex5
Virtex4

Lab: Connecting High Speed DDR Parallel I/F in FPGA

3. ChipScope

Basic Overview on ChipScope capabilities
Tips & Tricks for ChipScope use

Lab: The power of ChipScope

4. Floorplanning techniques

Improve implementation run time and consistency
Reduce route congestion
Use unique Pblock capability

Lab: Floorplanning using PlanAhead toold

5. Advance Implementation option

When to use?
Design goals?
How to use and why?

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