Nº
564
DATE: CALL
Other available dates:
PRICE NIS: 3780 + VAT /9 Tcs
DURATION: 3 Days
Course Overview: Xilinx FPGAs provide a new level of system design capabilities through soft MicroBlaze™ processors, hard PowerPC® processors, AXI interconnect, and silicon-efficient architectural resources. This course brings experienced FPGA designers up to speed on developing embedded systems using the Embedded Development Kit (EDK). The features and capabilities of the Xilinx MicroBlaze soft processor are also included in the lectures and labs. The hands-on labs provide experience with the development, debugging, and simulation of an embedded system.
Level:
EMB HW 3
Who should attend?Engineers who are interested in embedded systems design trainnig on the Xilinx MicroBlaze soft processor using the Embedded Development Kit and a Xilinx FPGA
Prerequisities:
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FPGA design experience
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Completion of the Essentials of FPGA Design course or equivalent knowledge of Xilinx ISE® software implementation tools
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Basic understanding of C programming
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Some HDL modeling experience
Software Tools:
Xilinx ISE Design Suite: Embedded or System Edition 13.1
Hardware Architecture:
Spartan®-6 and Virtex-6 FPGAs
Demo board: Spartan-6 FPGA SP605 or Virtex-6 FPGA ML605 board
Skills Gained:
After completing this training, you will be able to:
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Describe the various tools that encompass the Xilinx Embedded Development Kit (EDK)
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Rapidly architect an embedded system containing a MicroBlaze processor and Xilinx-supplied AXI architecture IP by using the Base System Builder (BSB)
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Utilize the Eclipse-based Software Development Kit (SDK) to develop software applications and debug software
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Create and integrate your own IP into the Project Navigator environment
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Simulate your own custom peripherals with Bus Functional Models (BFMs)
Course Outline:
1. EDK Overview
2. Base System Builder
Lab 1: Hardware Construction with the Base System Builder
3. Software Development Using SDK
Lab 2: Adding and Downloading Software
4. Missing the Bus – Making Connections
5. Introduction to AXI
6. Interrupts
7. Adding Hardware to an Embedded Design
Lab 3: Adding IP to a Hardware Design
8. Processor Basics
9. Interfacing to a Processor System
10. Designing Your Own Peripheral Using the IPIC Interface
11. Installing Your Own Peripheral Using the IPIC Interface
Lab 4: Building Custom AXI IP for an Embedded System
12. Bus Functional Model Simulation
Lab 5: BFM Simulation
13. Adding Your Own IP to the Embedded System
Lab 6: Integrating a Custom Peripheral
Lab Descriptions
Lab 1: Hardware Construction with the Base System Builder– Create an XPS project by using the Base System Builder to develop a basic hardware system and generate a series of netlists for the embedded design.
Lab 2: Adding and Downloading Software– Complete the processes begun in Lab 1 using the SDK tools to create a software BSP and sample application. Configure the FPGA and download the application.
Lab 3: Adding IP to a Hardware Design – Learn to add IP from the many choices in the IP library. Use the GUI to add a general-purpose I/O module and access internal block RAM directly from the MHS file.
Lab 4: Building Custom AXI IP for an Embedded System– Create and add a custom AXI peripheral (LCD interface) to your design by using the Create or Import Peripheral Wizard.
Lab 5: BFM Simulation – Use the ISim simulator to perform Bus Functional Model simulation to verify functionality of the LCD bus peripheral added in the preceding lab.
Lab 6: Integrating a Custom Peripheral – Put it all together: add custom IP to the processor system, and then integrate the processor sub-system with other logic in an ISE design project.