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Hardware design has revolutionized the way the world interacts. Device capabilities continue to sky rocket today and designers must explore more ways to improve time to market. Debugging problems costs time and threatens stellar performance. Trial and error can push time to market to infinity and beyond.
Training fills the spaces between inefficiency and productivity. With Logtel high tech training, your engineers will find all the knowledge and skills necessary to go ahead and design the future. Advanced courses help you push the outer limits of the latest technologies. Logtel is also the Authorised Training Provider (ATP) in Israel and Turkey training Xilinx customers and partners.
Browse our variety of topics below. Logtel can also tailor-develop a training plan that fits your organization's current needs for the diverse background of your engineers. In-House sessions are offered to our clients on-site so you maintain your employee productivity throughout the training program. 'Public' training programs allow your selected employees starting from a single individual - to join training programs taking place at a Logtel training center.
* For more training opportunities, please check our Catalog or contact us for details.
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| Advanced PCI Express | Call | 1 |
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This course introduces and details PCIe new features as introduced in PCIe versions 2.1 and 3.0.
Each new topic is presented from four different perspectives: - Motivation - Implementation - Configuration - Example. This is an in-depth course and is both hardware and software oriented. It describes the different options and discusses performance. It is also useful when determining system architecture. The course is based on well-known PCIe basics (as covered in the basic PCIe course at Logtel) [Close] |
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| Designing an Integrated PCI Express System | Call | 2 |
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Attending this course will provide students a working knowledge of how to implement a Xilinx PCI Express® core in custom applications. This course offers students hands-on experience with implementing a Xilinx PCI Express system within the customer education reference design. With this experience, users can improve their time to market with the PCIe core design. Various Xilinx PCI Express core products will be enumerated to aid in selecting the proper solution. This course focuses on the AXI streaming interconnect.
Level:Connectivity 3[Close] |
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| Designing with the Ethernet Mac controllers | Call | 2 |
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Become acquainted with the various solutions that Xilinx offers for Ethernet connectivity. Learn the basics of the Ethernet standard, protocol, and OSI model while applying Xilinx solutions via hands-on laboratory exercises. Perform simulation to understand fundamental principles and obtain the knowledge to assess hardware design considerations and software development requirements. Become familiar with Ethernet IP core design architectures, core IP port naming conventions, and signal waveforms.
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| Designing with UltraScale FPGA Transceivers | Call | 2 |
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Learn how to employ serial transceivers in your UltraScale™ FPGA design. Understand and utilize the features of the serial transceiver blocks, such as 8B/10B and 64B/66B encoding, channel bonding, clock correction, and comma detection. Additional topics include use of the UltraScale FPGAs Transceiver Wizard, synthesis and implementation considerations, board design as it relates to the transceivers, and test and debugging. This course combines lectures with practical hands-on labs.
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| EMI, EMC and ESD | 26/09/17 | 3 |
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In modern electronics, component size continues to decrease and complexity to increase. Electrostatic and magnetic fields and their interactions are becoming increasingly important. As problems have arisen, creative solutions had to be developed. An understanding of the principles and developments in this growing field is essential to many individuals in electronics industries
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| FPGA for Board Designers | 03/10/17 | 2 |
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| High-Speed Implementation and Simulation of DDR3 Interfaces | Call | 2 |
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This workshop is aimed at developers who want to implement high-speed interfaces between semiconductor components and who want to design complex high-speed circuits at board level. This Workshop is designed for developers who not only design schematics but also systems and the layout.
You will learn to judge when signal integrity is important and relevant, to interpret, for example, IBIS models, and to select appropriate termination procedures. Signal refection and crosstalk effects are described and demonstrated by simulation. Simulation examples are for typical PCB structures. You will learn how to implement high-speed buses, including clock design, loading and signal termination. Furthermore, the power distribution and bypassing design are main topics. Detailed discussion of solving potential Signal Integrity problems on high-speed memory interfaces and serial transceiver links (optional modules). [Close] |
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| How to Design a High-Speed Memory Interface | 23/07/17 | 2 |
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This course teaches hardware designers who are new to high-speed memory I/O to design a memory interface in Xilinx FPGAs. It introduces designers to the basic concepts of high-speed memory I/O design, implementation, and debugging using 7 series FPGAs.
Additionally, students will learn about the tools available for high-speed memory interface design, debug, and implementation of high-speed memory interfaces. The major memory types covered are DDR2 and DDR3. The following memory types are covered on demand: RLDRAMII, LPDDR, and QDRII+. Labs are available for DDR3 on the Kintex™-7 FPGA KC705 board.
Connectivity 3 |
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| How to Design a Xilinx Connectivity System in 1 Day | Call | 1 |
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This workshop introduces you to fundamental connectivity concepts and techniques for implementation in Xilinx FPGAs. The focus is on fundamental aspects of serial transceivers, PCIe® technology, memory interfaces, and Ethernet MACs. Only essential theory is introduced in order to lay a foundation for the material and topics covered in this workshop, which complements more detailed training found in subsequent Xilinx courses. Design examples and labs show components from the Connectivity Targeted Reference Design (TRD). In addition, an IBERT lab is available that highlights the usage of the serial transceivers.
Connectivity 2 |
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| How to Design High-Speed Interfaces | Call | 4 |
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Course Description
Are you interested in learning how to effectively utilize 7 series high-speed interface resources? This course supports both experienced and less experienced FPGA designers who have in minimum general digital hardware knowledge and basic information on 7 series FPGAs. Furthermore, first work with the new Xilinx VIVADO Design Suite is helpful. This course focuses on understanding as well as how to properly design for the high-speed interface solutions found in the new device families: transceiver in general, PCI Express and memory interfacing complemented with board design issues. Topics covered include interface overviews, design usage, simulation, implementation and examples on real hardware. This course also includes a detailed discussion about proper PCB design techniques that enables designers to avoid common mistakes and get the most out of their FPGA interfaces. A combination of modules and labs allow for practical hands-on application of the principles taught. [Close] |
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| PCB Layout Design | Call | 4 |
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Good PCB (Printed Circuits Board) layout design plays a major role in electronic devices. Smart phones, I-Pad, laptops and many micro devises includes high density and high speed electronic boards.
This training will enable the electronic design engineer to enhance the electronic board performance by understanding and considering the PCB design technologies and requirements while in the schematic design phase. Practical Engineers and Electronic Engineers who would like to enter the magnificent world of PCB layout design are welcome to participate this training in order to give you the life opportunity to become a layout designers. This training includes all aspects of PCB layout design starting from define the electronic constrains, build components footprints, smart 3D components placement in the PCB area , understanding PCB technologies, sophisticated traces routing methods & high speed routing, invoking PCB production files and understanding GERBERS formats. [Close] |
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| PCI Express | Call | 3 |
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The course provides a detailed and comprehensive understanding of the PCI Express technology.
The course is fully up-to-date and supports the latest version of the international specification (3.0), and covers all aspects of the specification from a hardware design perspective and also discusses the software requirements of PCI Express implementations. This course provides example implementations, and practical guidance that will give a running start on your design. [Close] |
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| PCI Express Bus GEN 1-3 | 27/08/17 | 3 |
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PCI Express is the open standards- based successor to PCI and its variants for server- and client-system I/O interconnects. Unlike PCI and PCI-X, which are based on 32- and 64-bit parallel buses, PCI Express uses high-speed serial link technology similar to that found in Gigabit Ethernet, Serial ATA (SATA), and Serial-Attached SCSI (SAS). PCI Express reflects an industry trend to replace legacy shared parallel buses with high-speed point-to-point serial buses.
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| PCIe Protocol Overview | Call | 1 |
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This course focuses on the fundamentals of the PCI Express® protocol specification. The typical PCIe architecture, including data space, data movement, and the most commonly used Transaction Layer Packets (TLPs) are covered. Interrupts and error handling are also discussed.
Implementation issues are covered in the two-day Designing a LogiCORE PCI Express System course. Level:Connectivity 2[Close] |
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| Power & Signal Integrity for Board Design | Call | 3 |
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Learn when and how to apply power & signal integrity techniques to high-speed interfaces between components. This comprehensive course combines design techniques and methodology with relevant background concepts of high-speed bus and clock design, including transmission line termination, loading, and jitter.
You will work with IBIS models and complete simulations using Mentor Graphics HyperLynx. Other topics include managing PCB effects and on-chip termination. This course balances lecture modules with instructor demonstrations and practical hands-on labs.
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| Signal Integrity and Board Design Using HyperLynx | 24/08/17 | 3 |
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Learn when and how to apply signal integrity techniques to high-speed interfaces between Xilinx FPGAs and other components. This comprehensive course combines design techniques and methodology with relevant background concepts of high-speed bus and clock design, including transmission line termination, loading, and jitter.
You will work with IBIS models and complete simulations using Mentor Graphics HyperLynx. Other topics include managing PCB effects and on-chip termination. This course balances lecture modules with instructor demonstrations and practical hands-on labs.
Connectivity 3 |
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| Tips & Tricks For Board Designers | 19/07/17 | 1 |
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Attending the Tips & Tricks for Board Design class will enrich your knowledge in several features of current board design. This 1 day seminar will familiarize you with new aspects and problems you may encounter during project development. In addition, by mastering the tools and the design methodologies presented in this course, you will be able to design faster, shorten development time, lower development costs and lower design risk.
Intermediate |
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| Zynq Board Design and High-Speed Interfacing | Call | 2 |
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Are you interested in learning how to effectively utilize Zynq-7000 SoC high-speed interface resources? This course supports both experienced and less experienced designers who have in minimum general digital hardware knowledge and basic information on Zynq devices. Furthermore, first work with the new Xilinx VIVADO Design Suite is helpful. This course focuses on understanding as well as how to properly design for the high-speed interface solutions found in the new device families: transceiver in general, PCI Express and memory interfacing complemented with board design issues. Topics covered include interface overviews, design usage, simulation, implementation and examples on real hardware.
This course also includes a detailed discussion about proper PCB design techniques that enables designers to avoid common mistakes and get the most out of their FPGA interfaces. A combination of modules and labs allow for practical hands-on application of the principles taught. [Close] |
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