VILT Tips and Tricks for FPGA Designers
Start Date: Please contact us
Course Overview
Attending the Tips & Tricks for FPGA Design class will enrich your knowledge in several aspects of the FPGA design world. This one day seminar will enable you to get familiar with new aspects and problems you may encounter during your project flow. In addition, by mastering the tools and the design methodologies presented in this course, you will be able to create your design faster, shorten your development time, lower the design risk and development costs.
Who should attend?
FPGA designers with intermediate knowledge, technical leaders and system engineers.Prerequisite:
Fundamentals of FPGA Design flow.
Knowledge in FPGA design tools.
Solid electrical design background
Software Tools:
ISE 13.1, PlanAhead, ChipScope, other useful utilities
Skills Gained: After completing this training, you will be able to:
New methodologies
New design rules
Clock tree architecture
Floorplanning techniques
Use the advance implementation option
Design your next project with better understanding and lower the risk
Course Outline:
Session 1
- FPGA Designers – It is all about architecture?
- Clock Tree Architecture
- Virtex6/Spartn6
- Virtex5
- Virtex4
- ChipScope
- Basic Overview on ChipScope capabilities
- Tips & Tricks for ChipScope use
- Floorplanning techniques
- Improve implementation run time and consistency
- Reduce route congestion
- Use unique Pblock capability
- Advance Implementation option
- When to use?
- Design goals?
- How to use and why?
- Summary
